At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology.Looking for Lead SoC/ASIC Digital Design Engineer with experience in Design for Test (DFT).

Ability to lead from DFT Architecture to Silicon Debug is required. An intimate knowledge and experience in scan chain insertion, compression scan technologies, memory built-in self-test (MBIST) and automatic test pattern generation (ATPG) is required for this position. Should follow systematic quality metrics driven ATPG pattern generation.

It is highly desirable for candidate to possess hands-on knowledge of synthesis, verification and debugging Verilog testbenches.Requirements;Prior 15-20 years of professional experience in SoC/ASIC Digital Design with focus on Design for Test (DFT)Should be able to lead DFT in projects from architecture to silicon debugShould possess intimate knowledge of DFT insertion flowsBasic scan chain insertion using synthesis or other software toolsExperience in compression scan insertion, LBIST and other scan technologiesIntimate knowledge of memory build-in self-test (MBIST)Expertise in Automatic Test Pattern Generation (ATPG) to achieve design test coverage goalsDebug and Analysis of failures to improve fault coverageVerification of ATPG testbenches and debugging root cause of simulation mis-comparesWorking knowledge of JTAG 1149.1/6, IEEE1500 and IEEE1687Knowledge of timing analysis and equivalency checks would be added bonusAbility to work in collaborative team environmentPrior experience with Cadence tools and flows is highly desirableShould be able to finish DFT tasks independentlyStrong problem-solving skills.

Exhibit discipline, thoroughness, and methodical approach in solving problemsAbility to work with stakeholders across cross-functional teams - Architecture, Design, Internal and External CustomersSelf-driven and committed individual who can work in a fast-paced project environmentannual salary range for San Jose, CA is $ 138,600 to $257,400. You may also be eligible to receive incentive compensation: bonus, equity, and benefits. Sales positions generally offer a competitive On Target Earnings (OTE) incentive compensation structure.

Please note that the salary range is a guideline and compensation may vary based on factors such as qualifications, skill level, competencies and work location. Our benefits programs include: paid vacation and paid holidays, 401(k) plan with employer match, employee stock purchase plan, a variety of medical, dental and vision plan options, and more.We're doing work that matters.

Help us solve what others can't.SummaryLocation: CARY; SAN JOSE; AUSTINType: Full time.